P-N Junction & Rectifiers P-N Junction & Rectifiers A p-n junction is the simplest electronic switch: it lets current pass easily in one direction and blocks it in the other. When p-type (hole-rich) and n-type (electron-rich) semiconductors are joined, carriers diffuse across the junction. Electrons move from n to p, holes move from p to n, leaving behind fixed ionized donors and acceptors. This creates a charge-free zone called the depletion region and an internal electric field that opposes further diffusion. The built-in field sets up a barrier potential (built-in potential), so small external voltages cannot easily push carriers across. Under forward bias (p-side at higher potential than n-side), the barrier is reduced; carriers are injected, and a large current flows once the applied voltage exceeds a small threshold (knee/turn-on: about 0.3 V for Ge, 0.7 V for Si). Under reverse bias, the barrier increases, only a tiny reverse saturation current flows (due to minority carriers), until destructive breakdown occurs at high reverse voltages. This one-way conduction lets diodes act as rectifiers—circuits that convert AC into DC. A half-wave rectifier uses one diode to pass only one half-cycle; a full-wave rectifier (center-tap or bridge) inverts the negative half too, giving a steadier DC. Real diodes are not ideal: they have a finite forward drop, a finite reverse leakage, a temperature-dependent behavior, and a non-linear V–I curve. Around an operating point, we describe their small-signal opposition by dynamic resistance. In rectifier design, we also track peak inverse voltage (PIV) across diodes and estimate average DC output and ripple. These ideas tie device physics (depletion, barrier potential, minority carriers) with practical power conversion. remember Think of the p-n junction like a one-way turnstile at a metro station: it opens easily if you push in the allowed direction (forward bias) but resists strongly if you try to go the wrong way (reverse bias). p-type Semiconductor Semiconductor doped with acceptors (Group III) so holes are the majority carriers and electrons are minority carriers. n-type Semiconductor Semiconductor doped with donors (Group V) so electrons are the majority carriers and holes are minority carriers. Depletion Region Charge-depleted zone near the junction containing fixed ionized donors and acceptors; it hosts the built-in electric field. Barrier Potential (Built-in Potential) The internal potential across the depletion region that opposes further diffusion of carriers at thermal equilibrium. Approximate forward voltage at which diode current rises rapidly (≈ 0.3 V for Ge, ≈ 0.7 V for Si). Knee (Turn-on) Voltage Formation of the junction starts with diffusion: electrons from the n-side fill holes on the p-side, and holes from the p-side fill electrons on the n-side. Each recombination near the interface leaves behind charged ions that cannot move. These immobile charges create an electric field pointing from the n-side to the p-side (in the crystal). The field drives drift of carriers opposite to diffusion. At equilibrium, diffusion current equals drift current, and no net current flows externally. The built-in barrier potential is material and doping dependent (for Si at room temperature, of the order of several tenths of a volt). Importantly, the junction is not a metal contact; it is a space-charge region whose width and height respond to external bias. Forward bias narrows the depletion width and lowers the barrier, while reverse bias widens it and raises the barrier. This tunable barrier underlies diode rectification. Ideal diode current for applied voltage V; (I 0 ) is reverse saturation current, (V T = kT/q ) is thermal voltage (~25.9 mV at 300 K), and ( ) (ideality factor) is typically 1–2. Shockley diode equation Describes the current-voltage (I-V) characteristic of a semiconductor diode under forward and reverse bias conditions. tip Use the Shockley equation for low to moderate currents in a simple diode without series resistance or high-level injection. Temperature strongly affects both V T and I 0. The ideality factor ( ) lies between 1 and 2 depending on recombination mechanisms. rapid rise Si knee ~0.7 V 0.7 ≈0 Reverse leakage small -0.2 Exponential rise in forward bias after knee; tiny flat reverse saturation current until breakdown. control dependent Diode current I mA Voltage across diode V (forward +, reverse −) iv Qualitative V–I curve of a silicon diode. 2D PLOT Diode I–V characteristic (Shockley equation) I = I0 (exp(V/(eta VT)) - 1) I0 Saturation current eta Ideality factor VT Thermal voltage Dynamic resistance captures how the diode responds to small changes around an operating point on its non-linear curve. If a small signal rides on a DC bias, the current changes by ( I ) for a small ( V ). The ratio (r d = V/ I ) is the local slope of the V–I curve (strictly, the differential ( d V/ d I )). In forward bias where (I I 0 ), differentiating the Shockley equation gives the handy estimate (r d V T /I ). As current increases, (r d ) becomes very small, which is why a forward-biased diode looks like a near short after turn-on. In reverse bias before breakdown, the current hardly changes with voltage, so (r d ) is very large. Forward bias means p-side (anode) at higher potential than n-side (cathode). Do not swap this with electron flow direction. Conventional current flows from anode to cathode in forward bias. neet-alert Small current due to minority carriers under reverse bias; increases rapidly with temperature. Reverse Saturation Current (I0) Maximum reverse voltage a diode must withstand in a rectifier without breakdown. Peak Inverse Voltage (PIV) Rectification uses the directional conduction of diodes to turn AC into DC. A half-wave rectifier uses a single diode in series with a load: it transmits only the positive half-cycles to the load (assuming ideal diode), blocking negative half-cycles. The output is a pulsating unidirectional waveform whose average (DC) value is (V DC = V m / ), where (V m ) is the peak secondary voltage delivered to the diode. A full-wave rectifier utilizes both halves. In a center-tapped design, two diodes conduct on alternate half-cycles using opposite ends of the secondary; in a bridge, four diodes steer both halves through the load in the same direction. Full-wave rectification doubles the ripple frequency, raises (V DC ) to (2V m/ ) (ideal diodes), and reduces ripple factor compared to half-wave. Local (small-signal) opposition to changing current: r d = ΔV/ΔI, the slope of the V–I curve at the Q-point. Dynamic (AC) resistance near a bias point: r d = ΔV/ΔI ≈ η V T / I for a forward-biased ideal diode. Shockley diode law Differentiate with respect to V Forward bias (beyond knee) Small-signal (differential) resistance Dynamic resistance r d for a diode near a bias point r d = d V d I V T I ; ; (forward bias) , r d = V I ; (finite small changes) Low-level injection, temperature constant Series resistance negligible near Q-point Small-signal variation around a DC operating current I Use small-signal estimate r d ≈ η V T / I (forward bias, I ≫ I0). Substitute values in SI Compute easy At 300 K, a silicon diode conducts a forward DC current of 10 mA at an operating point. Estimate its dynamic resistance r d around this point. Take η = 2 for this operating region and V T ≈ 25.9 mV. V–I characteristics and small-signal resistance of diode (typical NEET pattern) I = 10 mA = 0.010 A V T = 25.9 mV η = 2 Dynamic resistance r d near the Q-point Peak Inverse Voltage (PIV) is a key safety parameter in rectifiers. In a half-wave rectifier (ideal transformer, ideal diode), the non-conducting diode must withstand the full secondary peak (V m ) in reverse bias. In a center-tapped full-wave rectifier, each diode must withstand about (2V m ) because the other half of the secondary drives the junction more negative. In a bridge rectifier, each diode typically sees only about (V m ) in reverse. Real designs also account for diode drops, transformer resistance, and mains surges by choosing diodes with a significant safety margin over the calculated PIV. Half-wave rectifier: operation over one cycle Positive half-cycle: the diode is forward biased; current flows through the load; output follows the input peak (minus diode drop). Zero crossing: load current falls to zero; diode stops conducting. Negative half-cycle: the diode is reverse biased; ideally, no current flows; output is zero. Average (DC) value over a cycle: for an ideal diode, V DC = V m $ / π. Comparison assumes ideal diodes and ideal transformer unless stated. Parameter Half-wave Full-wave (center-tap) Full-wave (bridge) Number of diodes Transformer requirement Simple secondary Center-tapped secondary Simple secondary V DC (ideal, no drop) V m / π 2 V m / π 2 V m / π Ripple frequency 2f 2f Typical PIV per diode V m ≈ 2 V m ≈ V m Ripple factor (typical) ≈ 1.21 ≈ 0.48 ≈ 0.48 “Si is Seven, Ge is Three” — Silicon knee ≈ 0.7 V, Germanium knee ≈ 0.3 V. For a sine, V m = √2 V rms. For half-wave with a diode drop, peak at load ≈ V m − 0.7 V (if conduction substantial). Average V DC ≈ ( V m − 0.7)/π (idealized). PIV ≈ V m for half-wave. Secondary peak Approximate average with diode drop Half-wave PIV A 230 V (rms), 50 Hz AC mains feeds an ideal transformer with turns ratio 10:1 (primary:secondary). The secondary drives a half-wave rectifier with a silicon diode (0.7 V drop) and a large load resistance so conduction angle is close to ideal. Find the peak secondary voltage, the average DC output voltage across the load (approximate), and the PIV requirement for the diode. medium V primary(rms) = 230 V, f = 50 Hz Turns ratio = 10:1 ⇒ V secondary(rms) = 23 V Silicon diode drop ≈ 0.7 V (forward conducting) V m (secondary peak), V DC (HWR), and PIV Half-wave rectifier output and PIV Rectifier formulae above assume ideal diodes and no filtering. With a smoothing capacitor, V DC rises towards V m and ripple depends on load and C. Always state assumptions: ideal diode, sinusoidal source, large load resistance (no conduction overlap), etc. tip Full-wave rectification with a center-tapped transformer uses two diodes. During the positive half-cycle of the upper end, the upper diode conducts and the lower is reverse-biased; during the negative half, the roles swap. The load always sees current in the same direction. The price is a special transformer and a higher PIV (≈ 2V m) for each diode. A bridge rectifier avoids the center-tap by using four diodes in a ring: two conduct each half-cycle, flipping the negative half upward. The bridge’s advantage is using a simple secondary and lower PIV (≈ V m ) per diode; the trade-off is two diode drops in series during conduction. remember In a bridge, the load is always between the bridge’s DC terminals; two diodes conduct in series each half-cycle. In a center-tap design, only one diode conducts at a time. V DC (full-wave) and PIV for each diode V rms = 12 V ⇒ V m = √2 × 12 ≈ 16.97 V Two diode drops in conduction: 2 × 0.7 V = 1.4 V Bridge rectifier output and PIV hard A transformerless lab supply uses a bridge rectifier feeding a resistive load. The AC source is 12 V (rms). Assume ideal diodes except for a 0.7 V drop per conducting diode. Find (a) the average DC output, (b) the approximate PIV for each diode. Peak of input Peak delivered to load after two drops Average of full-wave rectified sine Each non-conducting diode sees roughly the peak reverse Ideal full-wave average (no drops) is 2 V m / π. Subtract series drop approximately from peak before averaging. A forward-biased diode has zero resistance after turn-on. The forward drop stays finite (≈ 0.7 V for Si, 0.3 V for Ge), and the I–V curve is still exponential. Around any Q-point, dynamic resistance r d = dV/dI is small but not zero. Center-tapped design has about 2V m PIV per diode; a bridge typically has V m . Confusing these leads to wrong diode ratings. In a center-tapped full-wave rectifier, PIV per diode is the same as in a bridge. neet-alert Do not confuse static resistance (V/I at a point) with dynamic resistance (ΔV/ΔI or dV/dI). Many questions ask specifically for small-signal resistance at a given forward current. NAND gate output: Y = overline(A · B). Output is 0 only when both inputs are 1. AND is true only when both are true NAND is inversion (NOT) of AND Truth table consistency Boolean expression for NAND: Y = A B Y = A B Binary logic with inputs A, B ∈ 0,1 Definition of AND and NOT operations NOR gate output: Y = overline(A + B). Output is 1 only when both inputs are 0. OR is true if any input is true NOR is inversion of OR Truth table consistency Boolean expression for NOR: Y = A + B Binary logic with inputs A, B ∈ 0,1 Definition of OR and NOT operations Y = A + B Common-base current gain: α = I C / I E , typically 0.95–0.99 in active region. Common-base current gain (α) Definition of CB current gain Current relation Hence α is slightly less than unity = I C I E BJT in active region Emitter as input, collector as output KCL at transistor: I E = I B + I C Common-emitter current gain: β = I C / I B , often 20–500 depending on transistor and bias. From β definition Eliminate currents Invert relation (α < 1) Relation between β and α Active region: I E = I B + I C Definitions: ( = I C/I E ), ( = I C/I B ) = 1- , ; = 1+ DC current gain in common-base: α dc = I C / I E (same form as α for DC conditions). Steady-state (DC) currents BJT in active region dc = I C I E DC current gain in common-base (α dc) Definition for DC Always < 1 DC current gain in common-emitter: β dc = I C / I B . Definition for DC Useful auxiliary relations DC current gain in common-emitter (β dc) dc = I C I B Steady-state (DC) currents BJT in active region Dynamic resistance of diode (finite difference form) Definition (incremental) Differential limit Small signal around Q-point Temperature constant r d = V I ( d I d V ) -1 Temperature effects are crucial. Reverse saturation current I0 roughly doubles for every ~10 °C rise (rule of thumb), making the forward drop slightly smaller at higher temperature (for a given current). Silicon diodes are preferred for power rectifiers due to lower leakage and higher thermal stability than germanium. In measurements, always convert mA to A and note that the thermal voltage V T = kT/q increases linearly with absolute temperature (≈ 25.9 mV at 300 K, ≈ 26.7 mV at 310 K). Knee (turn-on) voltage ≈ 0.7 V ≈ 0.3 V Reverse leakage at 300 K Low Higher Thermal stability Better Worse Common rectifier use Power rectifiers, general purpose Legacy, special cases Property Silicon (Si) Germanium (Ge) Measuring V–I characteristics in a lab typically uses a series resistor with a variable DC supply to limit current. Start in reverse bias at small voltages to observe leakage, then gradually increase forward bias, recording current increments and plotting I vs V. The slope near any chosen Q-point gives the dynamic resistance. Avoid rapid voltage changes near breakdown in reverse bias, and keep the diode within its datasheet power and current ratings. neet-alert PIV trap: In a center-tapped full-wave rectifier, each diode sees roughly twice the secondary peak (2V m), not V m . Many quick guesses miss the factor of two due to the other half of the winding. Breakdown mechanisms: At sufficiently high reverse bias, the junction breaks down and conducts heavily. Zener breakdown (in heavily doped, thin junctions) occurs via tunneling at relatively low voltages with a sharp knee; avalanche breakdown (lighter doping) results from impact ionization and usually has a softer onset. Ordinary rectifier diodes are not meant to operate in breakdown; Zener diodes are designed to do so safely and are used for voltage regulation. Dynamic vs static resistance in practice: Suppose a diode at 0.74 V carries 15 mA, and a small AC signal adds ±5 mV. The static resistance at that point is R static = V/I ≈ 0.74/0.015 ≈ 49 Ω. But the small-signal dynamic resistance is r d ≈ η V T /I (take η ≈ 2) ≈ (2×25.9 mV)/15 mA ≈ 3.45 Ω, which governs small AC variations around the bias. Circuit analysis of small signals uses r d , not V/I. Power and ratings: Diode datasheets specify maximum average forward current, surge (peak) current, and maximum reverse voltage (often listed as repetitive and non-repetitive peaks). In rectifiers, current stress is highest near peaks and during inrush (e.g., with large filter capacitors). Always select diodes with comfortable margins: PIV at least 2–3× the calculated need for mains applications, and current rating above the expected RMS and surge levels. Effect of diode drop on rectifiers: In the half-wave rectifier, the forward drop subtracts from the peak before computing the average. In a bridge, two drops occur in series, so the average is lower than the ideal prediction by roughly (2×0.7)/π for silicon diodes, if conduction covers most of the half-cycle. For low-voltage supplies, these drops are significant; Schottky diodes (≈ 0.2–0.4 V drop) or synchronous rectification (active switches) are preferred. Reverse recovery and speed: The simple DC rectifier analysis assumes instantaneous switching. Real diodes store charge during forward conduction and take finite time to recover when reverse-biased, causing brief reverse currents and extra loss at high frequency. Fast-recovery and Schottky diodes reduce this effect and are used in switching power supplies, while slow, robust diodes (e.g., 1N5408) are fine for 50–60 Hz mains rectification. Load and filtering: Without a filter, rectifier output is a pulsating DC whose ripple amplitude depends on the rectification type. Adding a capacitor across the load holds the peak and discharges between peaks through the load, reducing ripple. The ripple frequency is f for half-wave and 2f for full-wave; thus, for the same load and capacitance, full-wave gives roughly half the ripple amplitude. While detailed ripple math may be beyond the basic scope, it is enough to know that larger C and larger load resistance (smaller current) reduce ripple. Key terms recap p-side terminal of a p-n junction diode Anode p-side n-side terminal of a p-n junction diode Cathode n-side Space-charge region lacking mobile carriers at the junction Depletion Region built-in potential Barrier Potential Built-in potential resisting diffusion across the junction Dynamic Resistance r d Small-signal resistance at the operating point: ΔV/ΔI (≈ η V T /I in forward bias) r d PIV PRV Peak inverse voltage rating required to avoid breakdown under reverse bias Circuit that converts AC to DC using diodes Rectifier r d = ΔV/ΔI; for small signals in forward bias, r d ≈ η V T / I. Equivalent small-signal resistance of a diode near the Q-point: r d = ΔV/ΔI. β dc = I C / I B ; relates collector and base DC currents. α dc = I C / I E ; DC version of common-base current gain. β = I C / I B ; AC/DC definitions differ by using small-signal vs total currents. α = I C / I E ; typically slightly less than 1 in active region. Y = overline(A + B); output high only when both inputs are low. Y = overline(A · B); universal gate used to build any logic.